Cascode E-mode FET Technology
Introduction
GaN HEMT is a normally-on device, which needs a negative gate bias to pinch off the 2DEG channel. A gate dielectric insulator is inserted between the gate metal and AlGaN top barrier layer to lower leakage and passivate the device, as known Metal-Insulator-Semiconductor(MIS) structure,
which alternatively improves reliability. Though its threshold voltage is more negative compared to that of GaN HEMT, a higher output current with similar RDSon can be achieved.
which alternatively improves reliability. Though its threshold voltage is more negative compared to that of GaN HEMT, a higher output current with similar RDSon can be achieved.
A GaN cascade E-mode FET typically consists of high-voltage (HV) GaN D-mode MIS-HEMT and a low-voltage (LV) normally-off Si MOSFET, both of which are connected in series. As shown in the following circuit schematic for the GaN cascade E-mode FET, its input gate terminal is located at the gate of the LV MOSFET, and the output drain terminal is on the drain of the HV GaN D-mode MIS-HEMT. Namely, the LV Si MOSFET takes charge of gate driving while the GaN cascade E-mode FET supports HV power switching.
Advantage
The GaN MIS-HEMT is easy to fabricate and presents high yield, reliability, and reproducibility. The associated GaN cascode FET thus carries on these advantages.
Contributing to the Si LV MOSFET, the GaN cascode E-mode FET owns capabilities of large gate swing and adjustable threshold voltage, which increase flexibility and easiness for system integration.
Contributing to the Si LV MOSFET, the GaN cascode E-mode FET owns capabilities of large gate swing and adjustable threshold voltage, which increase flexibility and easiness for system integration.
